The patterning process of conductive bridging random access memory (CBRAM) elements, also referred to as phase metallization cell (PMC) elements, is one of the key process steps when manufacturing a working CBRAM device.
In the integration scheme, usually a metal hard mask is provided in direct contact with the conductive bridging stack, which includes a chalcogenide layer including for example germanium selenide (GeSe) or germanium sulphide (GeS), and on the top of the chalcogenide layer, a silver layer, without any layer in-between the metal hard mask and the conductive bridging stack.
Usually, the metal hard mask layer is patterned using halogen plasma chlorine or fluorine. One problem with the patterning using halogen plasma, is that in this process silver (Ag) forms rather large agglomerations when it is exposed to the halogen plasma, which makes the conductive bridging stack etching step extremely difficult.
What is needed, therefore, is a memory structure in which the conductive bridging stack can be processed in a more reliable manner.